USENIX is sponsoring a workshop on Sustainable Information Technology (SustainIT). The following is link, a description of the workshop and the cfp.

http://www.usenix.org/events/sustainit10/

From the website:

Join us in San Jose, CA, on February 22, 2010, for the first SustainIT workshop. Increasingly, designers of computer systems ranging from small mobile devices to massive datacenters are concerned with sustainable design, including both power and life-cycle costs; these costs should include manufacturing, operation, and disposal of IT systems. SustainIT '10 brings together researchers as well as industry practitioners in a forum that presents the latest research and practices. The scope of this workshop is broad, covering research, theory, hardware, software, applications, techniques, etc.—all related to making computing systems greener.

--------------Call for papers-------------------

SustainIT '10 Call for Papers

First USENIX Workshop on Sustainable Information Technology
(SustainIT '10)

February 22, 2010
San Jose, CA

Sponsored by USENIX, the Advanced Computing Systems Association

SustainIT '10 will be co-located with the 8th USENIX Conference on File and Storage Technologies (FAST '10), which will take place February 23–26, 2010.

Important Dates

Submissions due: November 9, 2009, 11:59 p.m. PST
Notification to authors: December 14, 2009
Final papers due: January 11, 2010

Workshop Organizers

Program Co-Chairs
Ethan L. Miller, University of California, Santa Cruz
Erez Zadok, Stony Brook University

Program Committee
Kirk Cameron, Virginia Institute of Technology
Sudhanva Gurumurthi, University of Virginia
Anne Holler, VMware
Nikolai Joukov, IBM
Krishna Kant, Intel and the National Science Foundation
Geoff Kuenning, Harvey Mudd College
Dushyanth Narayanan, Microsoft Research
Eduardo Pinheiro, Google
Tajana Simunic Rosing, University of California, San Diego
Radu Sion, Stony Brook University
Soren Spies, EnergyConsumption.org
Matt E. Tolentino, Intel
Niraj Tolia, HP Labs

Steering Committee
Mark Burgess, Oslo City University
Alva L. Couch, USENIX Board Liaison, Tufts University
Carla Ellis, Duke University
Randy Katz, University of California, Berkeley
Jeff Kephart, IBM
Jai Menon, IBM
Milan Milanković, Intel
Niraj Tolia, HP Labs
Ellie Young, USENIX Association
Feng Zhao, Microsoft

Overview

Increasingly, designers of computer systems ranging from small mobile devices to massive datacenters are concerned with sustainable design, including both power and life-cycle costs; these costs should include manufacturing, operation, and disposal of IT systems. Energy costs are growing rapidly, as are the costs of producing, managing, and disposing of the material from which computing systems are built; worse, the long-term environmental impacts of this entire IT life-cycle are poorly understood. Whereas understanding the power that runs computer systems is important, it is not the only factor: the resources needed to manufacture a computer system can be comparable to and even exceed what it consumes in its useful lifetime. The research community and industry do not understand these issues sufficiently well, much less the trade-offs between energy used in various stages of a computer system's life and its interactions with performance, cost, reliability, usability, security, and more.

This workshop brings together researchers as well as industry practitioners in a forum that presents the latest research and practices. We seek papers that evaluate energy-related issues and their aforementioned trade-offs, present novel new ideas, challenge and/or debunk past and present practices, and more. We especially encourage papers that discuss not just energy issues but also how they interact with other dimensions in a sustainable manner. The scope of this workshop is broad, covering research, theory, hardware, software, applications, techniques, etc.—all related to making computing systems greener.

This workshop is co-located with FAST '10 in order to encourage researchers from the two events to interact with each other.

Topics

Topics of interest related to energy-sustainable computing include but are not limited to:

Energy vs. performance, cost, reliability, usability, security, etc.
Evaluations of long-term total costs of ownership (TCOs, e-waste, growth rates, recycling, etc.)
Total Impact of Ownership (TIO) in the long run (even decades-long)
Workload reduction techniques (e.g., compression, dedup)
Application of virtualization, cloud computing, clustering, and workload management
Hardware-based techniques (e.g., new electronics, clock-gating, disaggregation)
Firmware-based techniques (e.g., APM, ACPI)
Right-sizing techniques (e.g., DVFS, DRPM)
Use of FLASH and other novel storage media
Impact of storage hardware and software stacks
Application-optimization techniques (e.g., compiler-based)
Theory, algorithms, and simulated results
Energy and energy-related metrics (e.g., $$$, Energy-Delay, PUE)
IT services and techniques to manage energy and reduce costs
Sustainability and life-cycle analysis
Practical energy technologies for the developing world
Datacenter techniques (e.g., blade servers, low-power CPUs)
Software-based techniques at all levels, from OS/kernel to applications
Evaluation and modification of business processes to reduce the environmental impact
Economics of energy-efficienct software and hardware design
New datacenter cooling and energy-management issues and designs, including use of renewable energy sources
Thermal and computational fluid dynamics (CFD) models for software and hardware co-design
Submissions

Submissions must be no longer than eight 8.5" x 11" pages and should be typeset in two-column format in 10 point type on 12 point (single-spaced) leading, with the text block being no more than 6.5" wide by 9" deep. Submissions are not anonymous; author information should be included on the first page.

Papers must be in PDF and must be submitted via the Web submission form, which will be available here soon. The deadline for submissions is November 9, 2009, 11:59 p.m. PST.

All papers will be available online to registered attendees prior to the workshop and will be available online to everyone starting on February 22, 2010. If your accepted paper should not be published prior to the event, please notify production@usenix.org.

Simultaneous submission of the same work to multiple venues, submission of previously published work, and plagiarism constitute dishonesty or fraud. USENIX, like other scientific and technical conferences and journals, prohibits these practices and may take action against authors who have committed them. See the USENIX Conference Submissions Policy for details. Questions? Contact your program co-chairs, sustainit10chairs@usenix.org, or the USENIX office, submissionspolicy@usenix.org.

Papers accompanied by nondisclosure agreement forms will not be considered. Accepted submissions will be treated as confidential prior to publication on the USENIX SustainIT '10 Web site; rejected submissions will be permanently treated as confidential.

Two venture firms invest in university faculty member green information technology invention

By Susan Trulove

BLACKSBURG, Va., December 5, 2008 -- Virginia Tech Intellectual Properties Inc. announces that Valhalla Partners and Virginia's Center for Innovative Technologies (CIT) GAP Funds have invested in MiserWare, Inc., a Blacksburg, Va. software company based on power-saving technologies for computing devices invented by Kirk Cameron, associate professor of computer science in the College of Engineering at Virginia Tech.

Cameron directs the Scalable Performance (SCAPE) Laboratory at Virginia Tech, where he conducts research to improve the efficiency of high-performance systems. He began his work in power-aware computing in 2002 and received the prestigious National Science Foundation Career Award supporting the work in 2004. Technologies from this research were the subject of a license agreement between Virginia Tech Intellectual Properties and Cameron's startup company, MiserWare, in July 2008.

The software being developed by MiserWare allows users to specify how much performance they are willing to sacrifice. The system automatically schedules processor frequencies to meet users' demands while minimizing power and energy consumption. "One of the key differences between this work and existing techniques is that our method considers system-wide performance as opposed to application-centric techniques," said Cameron. "Our techniques are completely transparent to users and applications. For instance, users may specify 5 percent performance loss is acceptable for power and energy savings. The system automatically monitors and meets these constraints without the need for training. The system simply responds to loads at runtime such that it can be deployed on existing applications and systems."

Dr. Kirk W. Cameron, leader of the SCAPE laboratory and an associate professor in Computer Science, has received an IBM Faculty Award for his work entitled "Building the Tree of Life on IBM Blue Gene/L and the Cell Broadband Engine." This award, in collaboration with postdoctoral fellow Dr. Xizhou Feng, will fund research with IBM researchers Carlos Sosa and Brian Smith to execute a new parallel implementation of the Bayesian phylogenetic inference method for DNA sequence data on the IBM BlueGene/L supercomputer and the Cell Broadband Engine. The PBPI software identifies
equivalent tree estimates almost 1500 times faster than the most widely-used, best-available sequential program and scales superlinearly to 4096 nodes. Says Cameron, "We are very excited about the opportunity to formalize our ongoing relationship with IBM. This award will enable us to exploit the high-performance characteristics of IBM hardware to answer important open questions in plant phylogeny."

Prof. Kirk W. Cameron, director of the SCAPE Laboratory, was named a 2007 Faculty Fellow of the Virginia Tech College of Engineering in recognition of excellence in research. Prof. Cameron accepted this prestigious award on behalf of the students that have contributed to the success of the SCAPE Laboratory since its inception. The award provides $5,000 in discretionary funding for each of the next three years. Congratulations to Dr. Cameron and the SCAPE team.

SCAPE Laboratory researchers have created a first-of-its-kind tool for profiling the temperature of source codes. Tempest is a "Temperature Estimator" that runs on any system with LMSensors installed and has been successfully tested on a number of x86, x86_64, PowerPC, multi-core, and multi-processor systems. Tempest provides a thermal profile of an application and correlates temperature data to source code. Tempest development was led by Hari K. Pyla and Prof. Kirk W. Cameron of SCAPE. The Tempest toolkit and source code are available from the Software tab on this page.

SCAPE undergraduates Chris Jones (BS USC, 2006) and Joseph Turner (BS USC, 2006) will both attend top graduate schools in pursuit of PhD's in Computer Science. Both students received honorable mentions for NSF Fellowships. Both students were highly recruited from several schools and offered full tuition and stipends. Chris has decided to attend UCLA to pursue studies at the intersection between biomedical applications and computing. Joseph has decided to attend Virginia Tech to pursue research in the SCAPE Laboratory. We wish both students the best of luck in the continuation of their academic studies.

SCAPE researcher Joseph Turner was recently offered a Cunningham Fellowship to pursue his PhD studies at Virginia Tech. The Cunningham Fellowship is the most prestigious Fellowship offered by Virginia Tech and comes with four years of stipend, tuition, and discretionary funds for travel and equipment. Congratulations to Joseph on this outstanding achievement.

SCAPE researcher Joseph Turner (B.S. USC, 2006) recently set his sites on a new challenge: walking from Georgia to Virginia. Joseph began his trek in January of 2007 and proceeded to march over 700 miles to just outside Roanoke, Virginia. At peak, he was traveling 20 miles per day by foot. Joseph plans to spend the rest of the summer realxing and traveling with friends before embarking on his PhD here at Virginia Tech in Fall 2007.

SCAPE researchers have been working for some time on extending power-related work to the memory subsystem. Matt Tolentino has led efforts on this thread resulting in a publication at ACM Computing Frontiers 2007. The paper, co-authored with Joseph Turner and Prof. Cameron, described formal control theoretic techniques for turning memory chips off and back on while limiting negative impact on performance. Congratulations to Matt and Joseph!

Another SCAPE first this year. SCAPE researchers have two papers at IPDPS, one of our top HPC conferences. The first paper, led by Rong Ge entitled "Power-aware Speedup" describes an analytical performance model of power-aware clusters. The second paper, led by Dr. Xizhou Feng describes the use of PBPI on the world's fastest supercomputer and is entitled "Building the Tree of Life on Terascale Systems." This work was accomplished in collaboration with Brian Smith and Carlos Sosa of IBM Rochester. IPDPS had only a 25% acceptance rate this year making these papers quite an accomplishment. Congratulations to Rong and Xizhou and keep up the excellent work.